BGA Technology Branches Out

When discussing BGAs (ball grid arrays) these days, you have to be careful. Why? Let's reread the first sentence. What type of BGA was I referring to? A few months back, I could have meant plastic or ceramic. But now that tape BGAs have come on the scene, BGA technology has gained a third dimension. So the technically correct way to specify a BGA is to add a prefix letter (C, P or T) corresponding to the BGA type. Yet, even these designations fall short of recent developments since full-matrix arrays have been joined by peripheral arrays, making board routing easier. What's more, even the full-matrix array has been re-engineered with routability in mind.

As a result, BGA technology is no longer just a single sprout on the packaging landscape. This technology has grown into a full-fledged tree, which continues to produce new branches. This month we'll climb out on one or two of those limbs and check out the view.

Design for Routability

If there is a lesson to be learned from new technology that has emerged in the past decade, it is this: the new stuff better not cost more. In other words, no matter what the anticipated benefits, a new packaging technology will not be welcomed with open arms when it has a higher price tag than what's currently available. People in this business have trouble looking beyond out-of-pocket expenses.

BGAs are no different. Aside from package cost, which could be higher depending on what comparisons are being made, there is the off-putting issue of bare board cost. If adding one or two BGAs increases the number of board layers because of routing difficulties, people start checking their wallets. Do we really need this BGA packaging, they might ask, if our board cost goes up? This writer believes that board cost is a sub rosa issue that has raised concerns among potential users of BGA technology.

Peripheral arrays represent one solution to the board cost dilemma. Instead of routing signals from the inner rows of a full-matrix array, you limit escapes to, say, four rows on the periphery of the package. That is the approach taken by Amkor Electronics (Chandler, AZ) with its new 256 PBGA design. The 27 mm2 package arranges solder balls on 1.27-mm pitch in four rows along the perimeter. As a result, routing can be done in two layers of the motherboard instead of four.

In addition, Amkor reports improved electrical characteristics due to shorter conductor runs and enhanced power and ground distribution. According to Amkor, inductance is 30 to 50% lower with the peripheral PBGA than with previous PBGA designs. The company attributes this improvement to direct connections from signal vias to ball pads, as well as power and ground rings designed into the PBGA carrier board The rings also increase the maximum number of allowable wire bonds 1/2 to about 270.

Amkor believes that its perimeter BGA is so superior to full-matrix designs, both in terms of electrical performance and routability, that a mass migration toward this concept will take place this year.

Likewise, Motorola (Austin, TX) has begun to publicize a PBGA design that facilitates routing. Although a full-matrix design, this package limits signal routing to the four outermost rows. Used for the Motorola 68356 processor, this PBGA consists of a 19 X 19 array with 357 balls on 1.27-mm pitch. The 9 X 9 array at the center is reserved for a ground bus, while the next row of 40 balls forms a power ring. These inner connections drop straight down to the board's power and ground planes. The remaining four outer rows can then be routed to two signal layers based on 8-mil lines and spaces. Motorola engineers write that this concept extends to other 1.27-mm-pitch BGAs for such Motorola devices as fast SRAMs, the PowerPC 603 and 604 chips, as well as a PCI bridge/memory controller for PowerPC processors. While SRAMs come in plastic, the PowerPC devices will be available as ceramic BGAs.

It doesn't take a genius to conclude that BGA design for routability will become an anthem among BGA users. People in board assembly will not take kindly to BGA packages designed with a haphazard array of power, ground and signal connections. So chip and package designers will have little choice but to come on board (both figuratively and literally) with the folks that design and build BGA assemblies.

TBGA Offshoot for the High End

The BGA technology tree recently sprung yet another branch - tape ball grid arrays, or TBGAs. Based on IBM technology, TBGA packaging has found one path to market via chips offered by VLSI Technology (San Jose, CA). VLSI claims that its TBGA packages are the first ones commercially available for chips combining a high pin count and high performance. The company has introduced a series of six TBGA packages ranging from 380 balls on a 31 mifi2 body to 672 balls on a 40 mm2 body. Ball pitch is 1.27 mm. This TBGA family is designed to handle cell-based and gate array devices of more than SM gates, as well as clock rates beyond 150 MHz. VLSI is promoting its TBGA-packaged chips for such applications as workstations, supercomputers, parallel computing, networking and transmission and digital television Systems.

For VLSI, the TBGA is the high pin-count package of choice. Take package cost. By that yardstick, the CPOA, which is a typical choice for large chips, isn't even close. "We like to position the TBGA to be at a cents/pin point - basically at about half [the cost] of a CPGA," says Herb Reiter, director of ASIC product planning for VLSI's ASIC core technology. TBGAs also come in below plastic PGAs on a cost-per-pin basis, notes VLSI. Ceramic BGA technology missed the cut as well. "We find TBGAs to be economically much more attractive," says Reiter.

TBGA packages can match the thermal performance of CPGAs, according to VLSI. For example, with an external heatsink and 200 ft./min. air flow, a TBGA package can dissipate 10 to 15W, reports Reiter. In addition, inductance and parasitic capacitance are lower for TBGAs than for CPGAs.

In VLSI's TBGA, a gold-bumped die is bonded by thermal compression to the inner leads of a two-metal layer tape. The chip is fanned out on the top side, and vias transfer these connections to solder balls on the bottom layer, which also contains a ground plane. This construction dictates a peripheral array - a full matrix was not an option. To provide support, a stiffener frames the tape package. Attached to this stiffener and the back side of the die is a cover plate, which protects the die and dissipates heat. Including solder balls, the package has a height of 2.0 mm.

For the better part of 18 months, VLSI worked with IBM to improve the TBGA package in such areas as manufacturing, reliability, economics and handling. "We contributed on component-level issues," says Reiter. "In certain cases, we turned out to be more critical, more detailed than IBM specs called for."

Now this partnership has borne fruit. VLSI is satisfied that the new package is ready for the market, and production is scheduled for the first quarter of this year. "At this point, we are achieving very good results with our reliability tests," declares Reiter.

Board assembly, however, is still being fine tuned. VLSI has teamed up with Zycon (Santa Clara, CA), a bare-board shop, and Solectron (Milpitas, CA), a contract manufacturer, to work out assembly processes for TBGAs. One issue to be settled is solder paste thickness. Unlike PBGAs that rely on eutectic solder balls, the TBGA uses a high-temperature solder ball - 90% Sn, 10% Pb - that doesn't collapse with reflow. Because of this solder ball type, VLSI says that paste thickness may need to be tightly controlled.

TBGAs face one problem that has plagued BGA technology from the beginning. It's the same old story: you can't see the solder joints to inspect them. For those customers who are still bothered by this fact, Reiter has a solution. He reminds them that such complex designs as VLSI's chips almost always use boundary scan. So you can scan all your solder connections electrically.

But TBGAs avoid the thermal cycling issue that must be allowed for in the design of other BGAs. According to IBM, the TBGA's copper stiffener gives the package a coefficient of thermal expansion matching that of the board. As a result, there is no wear-out mechanism due to thermal cycling, the company reports.

Note that VLSI has not reached the I/O limit of cur-rent TBGA designs. IBM has built TBGAs with at least as many as 736 I/Os and can supply TBGA packages with balls on 40-, 50- or 60-mil pitch through IBM Microelectronics.

So TBGAs have joined ceramic BGAs and ceramic column grid arrays near the top of the BGA tree. More branches make for a healthier tree.

Reballing Technique

Reballing a BGA has proved to be one of the vexing issues associated with this technology. Now Raychem (Menlo Park, CA) has developed what appears to be a unique device for attaching solder balls to an array package. Building on its existing SolderQuik« technology, Raychem has come up with a water-soluble paper/polymer laminate that holds solder balls in place so they can be attached to the package. The beauty of this water-soluble holder is that, after reflow, you just moisten the holder and peel it off.

The SolderQuik« holder also has other uses besides reballing a package from the rework process. According to Raychem, the SolderQuik« BGA device is also suitable for failure-analysis testing, prototyping and volume production of BGAs.

Raychem, however, is not ready to take high-volume orders for its BGA device. "We are capable of responding in smaller prototype/sample quantities in a variety of different patterns," says Jim Westwater, manager of the Raychem business unit responsible for the SolderQuik« BGA device. Current plans are to launch the product in the first quarter of 1995.

The company is developing the BGA device in strip form with multiple arrays to be compatible with standard package production. Raychem says this process would offer an economical alternative to ball loading machines that can cost as much as $1 million.

1. Mawer, Andrew, and Ken Rhyner, 'Reliable BGAs Take On Extra Routes,' Electronic Engineering Times, September 26, 1994, p.98.

John Tuck publishes a newsletter called the Manufacturing Market Insider.
For more information, contact JBT Communications, Needham Heights, MA, (617)444-2154.

Reprinted with permission from CIRCUITS ASSEMBLY. February 1995